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WFI32E02UE
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© 2020 Microchip Technology Inc. DS60001192D-page 50-1
Section 50. CPU for Devices with MIPS32® microAptiv™
and M-Class Cores
This section of the manual contains the following topics:
50.1 Introduction .................................................................................................................. 50-2
50.2 Architecture Overview.................................................................................................. 50-4
50.3 PIC32 CPU Details ...................................................................................................... 50-8
50.4 Special Considerations When Writing to CP0 Registers ........................................... 50-13
50.5 MIPS32 Architecture .................................................................................................. 50-14
50.6 CPU Bus .................................................................................................................... 50-15
50.7 Internal System Busses ............................................................................................. 50-15
50.8 Set/Clear/Invert .......................................................................................................... 50-16
50.9 ALU Status Bits.......................................................................................................... 50-16
50.10 Interrupt and Exception Mechanism .......................................................................... 50-17
50.11 Programming Model................................................................................................... 50-17
50.12 Floating Point Unit (FPU) ........................................................................................... 50-24
50.13 Coprocessor 0 (CP0) Registers ................................................................................. 50-42
50.14 Coprocessor 1 (CP1) Registers ............................................................................... 50-121
50.15 microMIPS Execution............................................................................................... 50-132
50.16 MCU ASE Extension ................................................................................................ 50-132
50.17 MIPS DSP ASE Extension ....................................................................................... 50-133
50.18 Memory Model (MCU only) ...................................................................................... 50-133
50.19 Memory Management (MPU only) ........................................................................... 50-135
50.20 L1 Caches (MPU only)............................................................................................. 50-141
50.21 CPU Instructions...................................................................................................... 50-145
50.22 MIPS DSP ASE Instructions .................................................................................... 50-151
50.23 CPU Initialization......................................................................................................50-153
50.24 Effects of a Reset.....................................................................................................50-154
50.25 Related Application Notes ........................................................................................ 50-155
50.26 Revision History ....................................................................................................... 50-156
Problemløsning Microchip WFI32E02UE
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Specifikationer
| Mærke: | Microchip |
| Kategori: | Ikke kategoriseret |
| Model: | WFI32E02UE |